1. Field of the Invention
The present invention relates to a control device for power saving for electric and electronic appliances such as personal computers, printers, etc. which generates a suspension signal or a power-off signal to save power by detecting a horizontal sync signal and a vertical sync signal generated in the appliances.
2. Description of the Prior Art
Power saving is a function of electric or electronic appliances such as personal computers, printers, etc. which can prevent unnecessary power consumption by automatically putting the appliance in a power saving mode if the appliance is not used for a predetermined time. Power saving may be divided into a suspension mode for providing a power supply for a minimum basic operation of the appliance and a power-off mode for intercepting the power supply. In a personal computer, a processor provides to a control device for power saving a horizontal sync signal and a vertical sync signal being supplied to a monitor in a normal mode of operation if a key signal is not entered for a predetermined time. Then, the control device for power saving detects the sync signals and in combination of the sync signals, provides to a central processing unit (CPU) a suspension signal commanding the CPU to go into the suspension mode, or a power-off signal commanding the CPU to go into the power-off mode.
FIG. 1 is a schematic circuit diagram of a conventional device for power saving. Referring to FIG. 1, the conventional device is provided with a diode D1 for clamping an input horizontal sync signal Hsync, transistors Q1 and Q2 which are reversely turned on or off by the horizontal sync signal Hsync inputted through the diode D1, a diode D6 for clamping an input vertical sync signal Vsync, transistors Q4 and Q5 which are reversely turned on or off by the vertical sync signal Vsync inputted through the diode D6, diodes D2 to D5 and capacitors C2, C3, and C5 for rectifying and smoothing outputs of the transistors Q1, Q2, Q4, and Q5, and output transistors Q3, Q6 to Q8 which are controlled to be turned on or off according to the rectified and smoothed output signals to provide a suspension signal SUS or a power-off signal PO.
The numerals C1 and C4 denote coupling capacitors, R1 to R11 denote resistors, and B+ denotes a power supply.
The operation of the conventional control device for power saving as constructed above will now be explained.
Referring again to FIG. 1, if both the horizontal sync signal Hsync and the vertical sync signal Vsync are inputted, the input horizontal sync signal Hsync is clamped through the capacitor C1 and the diode D1, and the clamped sync signal is applied to the transistors Q1 and Q2 through the speed-up capacitor C6 and the resistor R1 to operate the transistors Q1 and Q2. The output of the transistor Q12 is rectified to a direct current (DC) signal by the diodes D2 and D3 and the capacitors C2 and C3, and this DC signal is applied to the transistors Q3 and Q7. The transistor Q3 is turned on by the voltage rectified by the diode D2 and the capacitor C2, while the transistor Q7 is turned on by the voltage rectified by the diode D3 and the capacitor C3. If the transistor Q7 is turned on, the transistor Q8 is turned off.
In the meantime, the input vertical sync signal Vsync is clamped through the capacitor C4 and the diode D6, and the clamped sync signal is applied to the transistors Q4 and Q5 through the resistor R6 to operate the transistors Q4 and Q5. The output of the transistor Q5 is rectified by the diodes D4 and D5 and the capacitors C3 and C5, and the rectified DC signal is applied to the transistors Q6 and Q7. The transistor Q6 is turned on by the DC voltage rectified by the diode D5 and the capacitor C5, causing the suspension signal SUS to become low. Also, the transistor Q7 is turned on by the DC voltage rectified by the diode D4 and the capacitor C3 and the voltage rectified by the diode D3, causing the power-off signal PO to become low. In this case, the system is in the normal mode.
In case that the horizontal sync signal Hsync is inputted, but the vertical sync signal Vsync is not inputted, the transistor Q6 remains turned off, resulting in that the transistor Q3 is turned off and the transistor Q7 is turned on. Accordingly, the suspension signal SUS becomes high, while the power-off signal PO becomes low, causing the system to go into the suspension mode. On the contrary, in case that the horizontal sync signal Hsync is not inputted, but the vertical sync signal Vsync is inputted, the transistors Q4, Q5, and Q7 are all turned on, but the transistors Q3 and Q6 are turned off. Accordingly, the suspension signal SUS becomes high, while the power-off signal PO becomes low, causing the system also to go into the suspension mode.
In case that neither the horizontal sync signal Hsync nor the vertical sync signal Vsync is inputted, the transistors Q1 to Q3, and Q7 are turned off, and the transistors Q4 to Q6 are turned off due to the absence of the horizontal and vertical sync signals Hsync and Vsync. Since the transistor Q7 is turned off, the transistor Q8 is turned on, and thus the suspension signal SUS becomes low, while the power-off signal PO becomes high, causing the system to go into the power-off mode.
However, the conventional control device for power saving as shown in FIG. 1 has the disadvantage that it has an inferior transient response characteristic since it is constructed as an analog circuit. Further, the initial operation of the conventional device becomes unstable due to the capacitance of the capacitors employed in the circuit. This causes the reliability of the power saving to deteriorate and integration of the circuit to be difficult.